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How to protect the chip from electrostatic discharge damage

Views: 41 Author: Site Editor Publish Time: Origin: Site

For today's electronic products, we should cover all ESD substrates by designing a solid ESD structure in an integrated circuit, but in most cases, engineers default that the device is safe and compliant, and ESD protection is rarely considered.

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ESD (Electro-Static discharge) means \"electrostatic discharge\". ESD is a discipline formed since the middle of the 20th century to study the generation, harm and protection of static electricity. Therefore, it is customary to refer to the equipment used for electrostatic protection as ESD, and the Chinese name is electrostatic impedance device.

The definition of electrostatic discharge or ESD is the transfer of electrostatic charges between objects or surfaces under different electrostatic potentials. Discharge will release ultra-high voltage in a short time, in the kilovolt (kV) range of 1 to 100 nanoseconds (ns). As you can imagine, for these types of voltage and time units, ESD events have fast edges. When such an event occurs, the rapid transfer of static charge can cause visible or invisible sparks.

ESD is usually only detected by sensitive electronic equipment. By touching the equipment without ESD protection, individuals are likely to unknowingly cause destructive damage to the device. In a highly charged ESD environment, the ESD protection silicon chip in the package will be destroyed (Figure 1).

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Figure 1. An enlarged example of chip ESD damage, showing the disappearance of metal traces, passivation cracking and a kind of thermal migration.

In Figure 1, the chip has an ESD event, the damage caused is catastrophic, with evaporated metal traces, damaged passivation areas and possible electrothermal migration soft errors. Technically speaking, if the circuit can still work, soft errors (such as specification degradation) may appear in the future.

This type of damage is most likely to occur during the packaging process or before the chip is assembled on the PCB. The IC's internal ESD protection circuit provides some protection for the chip during the pre-assembly process and assembly operations. In this environment, a low impedance ground path is used as a discharge path. In the packaging and testing environment, the realization of low-impedance grounding paths includes wrist straps, grounded floors, grounded desktops and ESD ion generators (such as ion fans, ion wind rods, ion wind nozzles, ion wind knives, and space ESD equipment). Once the IC is installed in the PCB and interconnected with other components, this protected environment is greatly reduced. It is necessary to reduce ESD damage through proper ESD control and prevention.

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People often generate static sparks when interacting with the surrounding environment. These static electricity will destroy the original characteristics of the chip. Such accidents will cause billions of dollars in losses every year. Before choosing the final product, be sure to follow the good ESD precautions in the laboratory and check the ESD protection specifications in the product data sheet.


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